More specifically, in back end of the line (BEOL) processing, each metal level (e.g., M0 to Mx) is formed so as to include metal lines (i.e., metal wires) and vias, which extend vertically from the metal lines to other metal lines below or, in the case of the first metal level, to semiconductor devices below. Typically, the metal lines and vias are formed using either discrete single damascene processes or a dual damascene process. Regardless of whether discrete single damascene processes or a dual damascene process are used, photolithography and etch processes are performed to pattern the via holes for the vias and separate photolithography and etch processes are performed to pattern the trenches for the metal lines. In other words, at each metal level, separate cut masks are required to form the via holes for the vias and the trenches for the metal lines, respectively. Requiring separate cut masks can be costly and time-consuming and can also result in voids, which are created by mask alignment problems and which can result in increased resistance and performance fails.